Course syllabus
Course-PM
DAT105 / DIT052 Computer architecture lp1 HT26 (7.5 hp)
Course is offered by the Department of Computer Science and Engineering
Contact details
Lecturer: Associate Professor Angelos Arelakis (angelos@chalmers.se)
Examiner: Professor Per Stenström (per.stenstrom@chalmers.se)
Teach assistants (TA)
- Chen Hongguang
- Masoud Nouripayam
- Joel Andersson
- Xu Wang
Course representatives:
- TBD
Links
Course purpose
Computers are a key component in almost any technical system today because of their functional flexibility as well as ability to execute fast in a power efficient way. In fact, the computational performance of computers has doubled every 18 months over the last several decades. One important reason is progress in computer architecture, the engineering discipline on computer design, which conveys principles for how to convert the raw speed of transistors into application software performance through computational structures that exploit the parallelism in software. This course covers the foundation and the important principles for how to design a computer that offers high performance to the application software.
Schedule
Course literature
M. Dubois, M. Annavaram, P. Stenström. Parallel Computer Organization and Design. Cambridge University Press. 1st or 2nd edition. Both work. Available at Cremona at Chalmers.
Supplemental education resources are provided at Canvas under Files and include copies of lecture slides, exercise references, articles for Real-stuff Studies and lab PM.
Course design
With reference to the learning objectives (summarised at the bottom of this page), the course covers architectural techniques essential for achieving high performance for application software. It also covers simulation-based analysis methods for quantitative assessment of the impact a certain architectural technique has on performance and power consumption. The content is divided into the following parts:
1. The first part covers trends that affect the evolution of computer technology including Moore's law, metrics of performance (execution time versus throughput) and power consumption, benchmarking as well as fundamentals of computer performance such as Amdahl's law and locality of reference. It also covers how simulation-based techniques can be used to quantitatively evaluate the impact of design principles on computer performance.
2. The second part covers various techniques for exploitation of instruction level parallelism (ILP) by defining key concepts for what ILP is and what limits it. The techniques covered fall into two broad categories: dynamic and static techniques. The most important dynamic techniques covered are Tomasulo's algorithm, branch prediction, and speculation. The most important static techniques are loop unrolling, software pipelining, trace scheduling, and predicated execution.
3. The third part deals with memory hierarchies. This part covers techniques to attack the different sources of performance bottlenecks in the memory hierarchy such as techniques to reduce the miss rate, the miss penalty, and the hit time. Example techniques covered are victim caches, lockup-free caches, prefetching, virtually addressed caches. Also memory technology and virtualization is covered, to some extent, in this part.
4. The fourth part deals with multicore/multithreaded architectures, specifically different approaches for how multiple threads can share architectural resources: fine-grain/coarse-grain and simultaneous multithreading. We also introduce the concept of cache coherence and fundamental approaches to implement it.
Organization
The course is organized into lectures, exercises, and three laboratory tasks. An important methodology for systematically designing computers is to assess the impact of architectural techniques on performance. This skill will be developed through a number of illustrative exercises as well as laboratory tasks. The detailed organization of the course and the course plan can be found in Files/Syllabus.
The pedagogical approach will primarily follow the traditional lecture format, possibly combined with the flipped-classroom method on a few occasions for deeper problem solving, depending on the number of students registered for the course.
Lecture material will usually be provided during the week of the lecture. For hybrid/flipped-classroom lectures, the instructor will provide the relevant material (e.g., lecture notes and videos) in advance, at least one week before the lecture, so that students can prepare beforehand and make more effective use of the in-class session.
On the day of each lecture, there will be an online quiz covering the lecture material (a consolidation quiz). Students who answer correctly on at least three of the six quizzes will receive four bonus points on the exam, which can be used toward achieving a higher grade.
In addition, the course makes use of case studies to reinforce the theoretical concepts taught in the course. This pedagogical activity gives students the opportunity to study how state-of-the-art computer systems apply the principles covered in the course. Students will work in groups to study articles on a focused topic, for example, the pipeline design of a microprocessor from NVIDIA or AMD, and present to the rest of the class how the design works. Successful completion of this activity provides four bonus points on the exam, which can be used toward achieving a higher grade.
The bonus points are added to the exam result and can be used toward achieving a higher grade, but they cannot be used to obtain a passing grade. Bonus points are valid for one year from the date of the first exam.
Learning objectives and syllabus
- master concepts and structures in modern computer architectures in order to follow the research advances in this field
- understand the principles behind a modern microprocessor to achieve a high performance for application software; especially advanced pipelining techniques that can execute multiple instructions in parallel
- understand the principles behind modern memory hierarchies and storage systems; and
- quantitatively assess the impact of an architectural technique on the performance of application software using state-of-the-art simulation tools.
Study plan (see Files/Syllabus)